| Four Serial FPDP Channels |
Four independent, bi-directional 2.5Gb Serial FPDP channels in compliance with ANSI/VITA 17.1. Each channel supports point-to-point, broadcast chaining, and single or multiple master ring topologies. |
| Serial FPDP Protocol |
The protocol supports flow control and three primary types of frames: data frame, SYNC frame, and SYNC without data frame. |
| RACE++ Ports |
Two independent RACE++ ports on P2 connector in compliance with the RACE (Real time Asynchronous Compute Environment) ANSI/VITA 5.1-1999 standard. |
| PCI Memory Nodes |
Two independent 64-bit/66MHz PCI memory nodes based on a proprietary ultra low latency core in compliance with the PCI-SIG® specification for the PCI 2.2 bus interface. |
| DMA Engines |
Each memory node has a Mailbox DMA engine that supports linked-list (scatter/gather) chaining and generates a semaphore on the completion of a DMA transfer. |
| PCI Memory Arrays |
Each PCI memory array can be configured with 512MB, 1GB, 2GB, or 4GB of SDRAM. |
| ECC |
Each PCI memory node has an ECC engine that detects and corrects all single-bit errors, detects all double-bit errors, and some three and four bit errors within the same nibble. |
| PowerPC Processor |
350MHz Motorola® 8245 PowerPC processor with MPC603e G2 superscalar core
• L1 cache: 16K instruction cache, 16K data cache • I2O message interface • 256 byte nvSRAM • RS-232 Serial Port • Status Indicators and Controls • 128MB local SDRAM with ECC • Real-Time Clock • On-board Timers • Watchdog Timer and Alarms • COP & JTAG Test and Debug Interfaces |
| Processor Flash |
32MB Flash |
| Protected Access |
For security against inadvertent Flash programming or corruption, a hardware switch is provided to disable the Write Enable line to the Flash devices along with additional high security capabilities. |
| Gigabit Ethernet |
On-board 10/100/1000 BaseT capable Ethernet Interface with integrated Gigabit Ethernet MAC and PHY layer functions supporting IEEE 802.3. |
| DMA Engines |
The MM-6467D includes eleven on-board DMA engines via the following devices: one for each of the four Serial FPDP channels, two PCI memory nodes, two PCI-to-RACE++ bridges, PowerPC processor, Gigabit Ethernet Controller, and Universe II PCI-to-VME64 bridge. |
| Status Indicators and Controls |
Ten front panel LEDs indicate Serial FPDP, Ethernet, and individual memory array status. Ethernet LEDs indicate link rate, two LEDs are software programmable, and one LED indicates processor BIST failure. A board reset signal is available and controlled by a push button switch. |
| Power Requirements |
+5.0V Supply: 2.7A (Standby), 2.7A (Operate), +3.3V Supply: 8.6A (Standby), 10.8A (Operate) |
| Physical Dimensions |
Height: 233.4 mm (9.2 in.)
Depth: 160 mm (6.3 in.)
Front Panel Height: 261.8 mm (10.3 in.)
Width: 19.8 mm (0.8 in.)
Maximum Component Height: 14.8 mm (0.58 in.)
Weight: 23.0 ounces |
| Environmental Specifications |
Operational Temperature: 0°C to +55°C, Ambient Storage Temperature: -40°C to +85°C |
| Vibration |
Operating: 0.5 G, Non-operating: 1.0 G |
| Relative Humidity |
0 – 95% Non-condensing |
| Altitude |
0 – 10,0000 Feet |
| Airflow |
200 LFM (Linear feet per minute) Minimum @ 55°C |