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Phoenix 6826 Dual Channel 2GSPS 10-bit Analog Input Card


  • One or two 10-bit, 2 GSPS A/D converters
  • Xilinx Virtex-II Pro FPGA
  • Up to 1 GB DDR SDRAM
  • Dual full duplex VXS links
  • Two or four front panel FPDP or FPDP II outputs
  • Ruggedized and conduction-cooled build options
  • Multiboard synchronization
  • TransComm™ compliant for simplified system development

The Phoenix 6826 is a high-frequency single or dual channel A/D converter in a 6U VXS/VMEbus form factor. It accepts one or two front panel analog inputs and delivers digital output samples over one or two 4X VXS high speed serial links and optionally over two or four FPDP connectors utilizing FPDP or FPDP II standards. The Phoenix 6826 is an ideal high-speed data acquisition front end for real-time recorders, digital receivers and DSP systems.

The TransComm™ communications suite is supported by the Phoenix 6826 to facilitate and simplify the rapid development of systems involving high speed communication between different elements.

Applications
The Phoenix 6826 is designed to solve the most demanding scalable processing requirements in embedded systems, in particular for applications such as:

• Real-time Recorders
• Radar
• Digital Receiver
• DSP Systems

Input Stage and A/D Converter
The Phoenix 6826 features one or two Atmel AT84AS008 2 GHz, 10-bit A/D converters driven from single-ended or differential RF signals applied through front panel MMCX female connectors at –2 dBm fullscale into 50 ohms. Although the standard transformer-coupled input circuitry accepts signals to 1 GHz, higher frequency input options are also available. An innovative dual-stage demultiplexer packs groups of eight data samples into 80-bit words for delivery to the FPGA at one eighth the sampling frequency (ƒs/8). This advanced circuit features the Atmel AT84CS001 demultiplexer, which represents a significant improvement over previous technology.

Clocking, Gating and Triggering
The A/D converter sample clock is an externally supplied sinusoidal clock at a frequency from 150 MHz to 2 GHz. This clock is accepted through a front panel MMCX connector with 50 ohm termination and distributed to both A/D converters (dual-channel version).

Synchronization and triggering circuitry supports synchronous data acquisition across multiple boards. Additional front panel MMCX connectors are provided for the application of a ƒs/8 clock to support multiboard synchronization.

Virtex-II Pro FPGA
The 6826 utilizes a XC2VP70 or XC2VP100 Xilinx Virtex-II Pro FPGA. The FPGA is equipped with 512 Mbytes of DDR SDRAM (optionally 1 Gbyte) and 16 Mbyte of FLASH memory.

The FPGA provides a flexible solution for data processing and communications over the high speed VXS interface or FPDP outputs. The FPGA also acts as a controller for board functions such as gate/trigger. Optional LVDS I/O is available through either the VMEbus P2 connector or a second-slot front panel mezzanine.

VXS Interface
The Phoenix 6826 provides two 4x full duplex VITA-41 links to the VXS P0 connector, each capable of peak rates to 1.25 Gbytes/sec. These links can support high speed serial fabrics such as TransComm, Xilinx Aurora, Serial RapidIO and PCI Express.

Last updated: Feb 28 2008, 09:21PM