Embedded Digest - May 2008


May 2008 Dear Valued Customer, Welcome to the current edition of the Embedded Digest. This monthly letter brings you up to date with recent news at VMETRO, from product announcements to upcoming events within the embedded computing market. In this issue, we highlight: FusionIPC: an Inter-Processor Communications (IPC) software for Distributed Multi-Processing systems 6U VPX/VPX-REDI Hybrid Processing Engines (HPE720 & HPE640) The Industry's first FPGA Mezzanine Card (FMC) Module (ADC510) 6U VPX/VPX-REDI Quad FPGA Multi-Processing Engine with dual FMC sites (FPE650) Seminar: Personalized Data Recording & Storage Webinar Article: The FPGA Mezzanine Card: Emerging VITA 57 (FMC) standard brings modularity to FPGA designs
Inter-Processor Communications Software Suite for Distributed Multi-Processing systems NEW FusionIPC is designed for use in demanding signal processing applications such as radar and signal intelligence where the workload exceeds the processing capability of a single CPU. FusionIPC utilizes the Serial RapidIO fabric on VMETRO's new VPX processing boards. Targeting architectures based on distributed memory models FusionIPC device drivers handle dynamic bulk data movement for peer to peer transfers based on Shared Memory Buffers Avoids excessive data copying through software stack freeing CPU for data processing Low overhead approach minimizes latency and maximizes performance from hardware Small footprint optimized for embedded applications Read more about FusionIPC >> \| Read the Press Release >>	FusionIPC
6U VPX/VPX-REDI Hybrid Processor Board with a MPC8641D CPU, dual Virtex-5 FPGAs and dual FMC sites NEW With an on-board Serial RapidIO (sRIO) switch and four x4 sRIO links to the backplane, the HPE720 supports a distributed switching system architecture that is well suited to Distributed Multi-Processing (DMP) applications. The HPE720 couples a dual-core Freescale Power Architecture MPC8641Ds with two latest generation Xilinx® Virtex®-5 FPGAs. A single or dual-core Freescale MPC8641D processor at 1.0/1.25/1.33GHz 2x Xilinx Virtex-5 FPGAs (LX110/220/330T, SX240T or FX200T) Multiple banks of DDR II SDRAM and QDR II SRAM memories 2x FPGA Mezzanine Card (FMC/VITA 57) sites OR 1 FMC and 1 XMC/PMC site Serial RapidIO backplane connectivity 6U VPX form factor, air and conduction-cooled variants Read more about the HPE720 >> \| Read the Press Release >>	HPE720
Industry's first FPGA Mezzanine Card (FMC/VITA 57) - Dual Channel 500 MSPS 12-bit ADC NEW The innovative design of the ADC510, based on the emerging VITA 57.1 standard, makes it easier for developers to integrate FPGAs and analog input into their embedded system designs. Typical DSP applications for this module include Signal Intelligence (SIGINT), Electronic Counter Measures (ECM), and Radar. Dual Texas Instruments ADS5463 ADCs ADC coupled analog input bandwidth up to 1.5GHz Choice of onboard and external clocks sources Multi-board synchronization capability FMC/VITA 57 form factor Air and conduction-cooled variants Read more about the ADC510>> \| Read the Press Release >> \| Request a Quotation>>	ADC510
6U VPX/VPX-REDI Quad Xilinx Virtex-5 FPGA Multi-Processing Engine with dual FMC sites NEW The FPE650 integrates four Xilinx® Virtex®-5 FPGAs with two FMC I/O sites and VPX high-speed serial backplane connectivity, allowing I/O and processing capabilities in a single 6U slot. The FPE650 is designed to tackle the most demanding digital signal processing applications such as Electronic Counter Measures (ECM), Signal Intelligence (SIGINT) and Electro-Optics (EO). Quad Xilinx Virtex-5 (LXT, SXT or FXT) FPGAs Dual FPGA Mezzanine Card (FMC/VITA 57) sites Crossbar switch with configuration processor Multiple banks of memory for high performance computing Air and conduction-cooled variants Read more about the FPE650 >> \| Read the Press Release >> \| Request a Quotation>>	FPE650
6U VPX/VPX-REDI Hybrid Processor Board with dual MPC8641D CPUs, dual Virtex-5 FPGAs and a FMC site NEW The HPE640 is well suited for applications that stream data from sensors to FPGAs over low overhead, point-to-point protocols like Aurora or Serial FPDP. The HPE640 couples two dual-core Freescale Power Architecture MPC8641Ds with two latest generation Xilinx® Virtex®-5 FPGAs. The HPE640 is designed to provide high-performance digital signal processing for demanding Intelligence, Surveillance and Reconnaissance (ISR) applications. 2x Dual-core Freescale MPC8641D processors at 1.25GHz 2x Xilinx Virtex-5 FPGAs (LX155T or SX95T) Multiple banks of DDR II SDRAM and QDR II SRAM memories VITA 57 / FMC site for I/O Aurora and PCI Express backplane connectivity 6U VPX form factor, air and conduction-cooled variants Read more about the HPE640 >> \| Read the Press Release >>	HPE640
Application Notes, White papers, Articles, Seminars and Resource Information Seminar: Schedule your one-on-one data recording webinar today Would you like to learn more about real-time data recording, playback, readback and analysis? Do you have a need for a data recording system that can store up to 720MB/s of sensor data in a single 6U VME/VXS slot? Schedule a no cost personalized one-on-one data recording webinar today with one of VMETRO's Business Development Managers or Applications Engineers! Article: The FPGA Mezzanine Card: Emerging VITA 57 (FMC) standard brings modularity to FPGA designs FPGAs are increasingly utilized in embedded system designs, especially in the I/O portion of embedded systems to implement complex I/O interfaces and perform in-stream data processing. A problem in the industry has been that the I/O interfaces are tightly coupled to FPGAs. This has limited the amount of reuse in FPGA designs because boards have to be designed specifically to handle a particular type of I/O. It has also limited the availability of COTS FPGA boards because it is difficult to design an FPGA with the right I/O for a wide range of customers. The new VITA 57 standard, also known as the FPGA Mezzanine Card (FMC) addresses these issues. The FMC standard defines an I/O mezzanine module that works intimately with an FPGA. An overview is presented of the FMC standard and the benefits it provides to developers. Technology Resources: Xilinx Virtex-5 FPGA \| FMC (VITA 57) \| VPX/VPX-REDI Ask your sales representative for a Product Selection Guide
A special invitation RapidIO Design Summit 2008 on May 21st in Munich Germany RapidIO Design Summit & Annual Meeting on May 30th during MicroTCA Summit in Washington, DC
VMETRO is dedicated to customer satisfaction and in no way intends to send unsolicited information. Our contact list is compiled from past dealings and interests of VMETRO or its subsidiaries. Please forward this e-mail to others who may be interested. VMETRO, Inc. 1880 S. Dairy Ashford, Suite 400 Houston, TX 77077 Tel: (281) 584-0728 www.vmetro.com info@vmetro.com
About Us Contact Us Privacy Register Change User Details RSS Feeds Sitemap